CS2354 ADVANCED COMPUTER ARCHITECTURE
UNIT I INSTRUCTION LEVEL PARALLELISM
ILP – Concepts and challenges – Hardware and software approaches – Dynamic scheduling – Speculation - Compiler techniques for exposing ILP – Branch prediction.
UNIT II MULTIPLE ISSUE PROCESSORS
VLIW & EPIC – Advanced compiler support – Hardware support for exposing parallelism – Hardware versus software speculation mechanisms – IA 64 and Itanium processors – Limits on ILP.
UNIT III MULTIPROCESSORS AND THREAD LEVEL PARALLELISM
Symmetric and distributed shared memory architectures – Performance issues – Synchronization – Models of memory consistency – Introduction to Multithreading.
UNIT IV MEMORY AND I/O
Cache performance – Reducing cache miss penalty and miss rate – Reducing hit time – Main memory and performance – Memory technology. Types of storage devices – Buses – RAID – Reliability, availability and dependability – I/O performance measures – Designing an I/O system.
UNIT V MULTI-CORE ARCHITECTURES
Software and hardware multithreading – SMT and CMP architectures – Design issues – Case studies – Intel Multi-core architecture – SUN CMP architecture – heterogeneous multi-core processors – case study: IBM Cell Processor.
TEXT BOOK
1. John L. Hennessey and David A. Patterson, “ Computer architecture – A quantitative approach”, Morgan Kaufmann / Elsevier Publishers, 4th. edition, 2007.
REFERENCES
1. David E. Culler, Jaswinder Pal Singh, “Parallel computing architecture : A hardware/software approach” , Morgan Kaufmann /Elsevier Publishers, 1999.
2. Kai Hwang and Zhi.Wei Xu, “Scalable Parallel Computing”, Tata McGraw Hill, New Delhi, 2003.